Technology

FPGA, Quantum-Safe & AI/ML Technology for Defence.

Qbit's core engineering disciplines — from post-quantum cryptography and FPGA acceleration to TSN networking and precision timing — powering sovereign, deterministic systems.

01⚡

FPGA & Hardware Acceleration

We design custom FPGA logic for deterministic, ultra-low-latency processing in networking, cryptography and signal processing applications. Our hardware-first approach removes CPU bottlenecks and enables real-time guarantees that software alone cannot provide.

Custom IP cores for 1G/10G/100G Ethernet MAC, TCP offload and TSN

Xilinx (AMD) Vivado and Intel Quartus design flows

AXI-Lite, AXI-Stream and PCIe Gen4 host interfaces

FPGA-based post-quantum cryptography acceleration (ML-KEM, ML-DSA)

Hardware timestamping with sub-nanosecond precision

02🔗

Time-Sensitive Networking (TSN)

We implement and validate the full IEEE 802.1 TSN standard suite, enabling converged networks where real-time control traffic and best-effort data coexist without interference. Our TSN IP cores and switches are deployed in industrial automation, aerospace and defence.

IEEE 802.1AS gPTP time synchronisation with sub-microsecond accuracy

802.1Qbv Time-Aware Shaper, 802.1Qci PSFP, 802.1CB FRER

Up to 24-port TSN switch fabric at 100 Gbps switching capacity

Conformance and regression test platforms built on NI PXI

Linux and Windows driver stacks for TSN endpoint NICs

03🔐

Quantum-Safe Cryptography

Classical asymmetric encryption will be broken by sufficiently powerful quantum computers. We build hardware-accelerated post-quantum cryptography solutions based on NIST-standardised lattice algorithms, securing defence and government communications for decades ahead.

ML-KEM (Kyber) and ML-DSA (Dilithium) hardware acceleration on FPGA

OpenSSL 3.x integration via provider API — no application changes required

PCIe-attached PQC accelerator endpoint (QPAE) with TRNG and secure key storage

TLS 1.3 hybrid classical + post-quantum handshake support

Side-channel attack protection and TPM 2.0 authentication

04🛰️

Satellite & RF Communications

Our satellite modem and receiver platforms support high and low data rate links to both LEO and GEO satellites. Built on fully digital FPGA architectures, they deliver flexible demodulation, advanced forward error correction and real-time baseband processing.

BPSK, QPSK, OQPSK, 8PSK, 16-QAM modulation and demodulation

Viterbi, Reed-Solomon, LDPC and SCCC forward error correction

Carrier-in-Carrier bandwidth optimisation for spectral efficiency

Dual-channel independent processing at up to 1000 MHz symbol rate

CCSDS-compliant telemetry reception and frame decommutation

05🧠

AI / ML & Edge Intelligence

We develop AI/ML inference and signal processing pipelines that run on custom hardware — eliminating cloud dependency for latency-critical and classified environments. Our SmartNIC and FPGA platforms accelerate AI workloads at the edge.

FPGA-accelerated neural network inference for edge deployments

Ultra-low latency SmartNIC with hardware-based packet classification

Custom AI pipelines for anomaly detection in real-time network traffic

Integration with PyTorch and TensorFlow model export flows

Zero-copy data transfer and 10G/25G line-rate processing

06⏱️

Precision Timing & Synchronisation

Sub-nanosecond time distribution is critical for 5G fronthaul, scientific instruments, power grids and defence systems. We implement White Rabbit technology on FPGA — delivering picosecond-class synchronisation over standard optical fibre without external timing hardware.

White Rabbit PTP (IEEE 1588-2019 High Accuracy profile) on FPGA soft IP

Sub-nanosecond synchronisation over 1 Gbps optical fibre up to 100 km

Synchronous Ethernet (SyncE) with hardware timestamping

Grandmaster and Boundary Clock support with GNSS disciplining

Dynamic compensation for temperature-induced fibre asymmetry

Deep Dives

Read the Technical Details.

Our white papers provide peer-reviewable technical depth on each engineering discipline.